Documentation

Koheron SDK V1 documentation. You are reading the documentation for the V1 branch. It uses CFG=.../config.mk, memory.yml, Linux FPGA Manager and device-tree overlays. It is not backward-compatible with 0.x instruments.

This documentation is organized as a workflow. Start with a known reference design, verify the complete build and deployment path, then modify the instrument configuration, FPGA design, server driver and user interfaces.

  1. Set up a development machine
  2. Build and run the reference example
  3. Use the build commands
  4. Understand the instrument files
  5. Modify the FPGA design
  6. Write Linux C++ drivers
  7. Control the instrument from Python
  8. Build a web interface
  9. Build and use SD card images
  10. Migrate an existing 0.x instrument

Minimal workflow

Clone the branch and prepare the host machine:

git clone -b V1 https://github.com/Koheron/koheron-sdk.git
cd koheron-sdk
make setup

Build the ALPHA250 FFT reference instrument:

make -j CFG=examples/alpha250/fft/config.mk

This creates the working archive at tmp/examples/alpha250/fft/fft.zip and also copies it to tmp/alpha250/instruments/fft.zip.

Upload and run it on a board:

make -j CFG=examples/alpha250/fft/config.mk HOST=192.168.1.100 run

Build a bootable SD card image only when the operating system or default runtime image must be regenerated:

make -j CFG=examples/alpha250/fft/config.mk image

For the ALPHA250 FFT example, the image target creates tmp/examples/alpha250/fft/alpha250-fft.zip.

Instrument model

An instrument is selected by passing its config.mk file to make:

make -j CFG=examples/alpha250/fft/config.mk

The instrument directory contains the files that define the complete build:

examples/alpha250/fft/
  config.mk          # build settings: board, cores, drivers, web assets
  memory.yml         # memory regions, registers, Linux mappings, parameters
  block_design.tcl   # Vivado block design
  fft.hpp / fft.cpp  # C++ server driver
  web/               # TypeScript, HTML and CSS interface

The build produces an instrument archive containing the FPGA bitstream binary, device-tree overlay, server executable, drivers.json, web assets and version file.

Runtime model

The runtime loads the FPGA through Linux FPGA Manager and applies the generated pl.dtbo device-tree overlay. The legacy /dev/xdevcfg path used by 0.x images is not the runtime path for this branch.

Porting from 0.x

The old CONFIG=.../config.yml flow is replaced with CFG=.../config.mk plus memory.yml. Read the migration guide before porting an existing 0.x instrument.

See also

[email protected]