The ALPHA15 is a programmable board built around a Zynq 7020 SoC. It features two 18-bit 15 Msps ADCs with high dynamic range, low noise front-ends. The high input impedance (up to 1 MΩ) is easy to drive and allows to directly interface sensors. Two input ranges are selectionnable: 2 Vpp (± 1 V) or 8 Vpp (± 4 V). Thanks to the very low flicker noise corner frequency (below 50 Hz) the ALPHA15 excels in high oversampling applications. The ALPHA15 also features a dual-channel 16-bit 250 Msps low latency DAC and a 4-channel 16-bit precision DAC. The high speed data converters are clocked by a dual PLL, ultra-low jitter clock generator. The board comes with a comprehensive, open source, FPGA / Linux reference design.
2290 €
Resources
Includes
- 12 V 1.5 A power supply
- Micro-SD card with pre-installed OS
Specifications
ALPHA15-1M | |
---|---|
Programmable logic, processor and memory | |
System On Chip | Zynq 7020 XC7Z020-2CLG400I |
Memory | 512 MB of DDR3L SDRAM |
Processor | ARM dual-core CPU (Cortex-A9) |
18-bit ADC | |
Number of channels | 2 |
Resolution | 18-bit |
Sampling rate | 15 Msps |
Coupling | DC |
Input impedance | 1 MΩ |
Flicker noise corner frequency | 50 Hz |
Input range | 2 V_{pp} or 8 V_{pp} |
Crosstalk | < 120 dB |
Input-referred voltage noise(10 kHz, 50 Ω input, 2 V range) | 7 nV/√Hz |
Input-referred voltage noise(10 kHz, 50 Ω input, 8 V range) | 18 nV/√Hz |
Total harmonic distortion(2 kHz, -3 dBFS, 8 V range) | -105 dB |
Effective number of bits(2 kHz, -3 dBFS, 8 V range) | 15 bits |
RF DAC | |
Number of channels | 2 |
Resolution | 16-bit |
Sampling rate | 250 Msps |
Coupling | DC |
Output impedance | 50 Ω |
Output range | 1 V_{pp} |
Ultra-low jitter clock for RF ADC, DAC and FPGA | |
Clock generator | Dual loop PLL, 100-fs RMS jitter (12 kHz to 20 MHz) |
On-board VCXO phase noise(10 kHz carrier offset) | 160 dBc/Hz |
Reference clock inputs | FPGA, external clock or internal crystal oscillator |
On-board TCXO | 10 MHz, 280 ppb |
External frequency reference range | 10 MHz ± 100 Hz |
Precision analog monitoring and control | |
Precision DAC | 4 channels, 16-bit |
Voltage reference | 2.5 V and 4.096 V, low-drift (3 ppm/°C) |
Temperature sensor | ±0.2 °C accuracy |
Other | |
Connectivity | 10/100/1000 Ethernet, USB 2.0, USB-UART |
General purpose I/O | 26 FPGA I/Os |
Operating temperature | -10 °C to 50 °C |
Outside dimensions | 113 mm x 108 mm x 27 mm |
Weight | 123 g |
Software | |
OS | Ubuntu 22.04 |
Block diagram
Characterisation
Transition noise
Transition noise is measured with 50 Ω terminated inputs.
Range 2 V
Transition noise is 2.7 LSB_{rms}, corresponding to an input voltage noise of $ v_{\rm in}$ = 21 µV_{rms}. Given that the full-scale range (FSR) is 2.048 V, the effective resolution is $ \log_{2} \left( \frac{\mathrm{FSR}}{v_{\rm in}} \right) $ = 16.6 bits.
Range 8 V
Transition noise is 1.67 LSB_{rms}, corresponding to an input voltage noise of $ v_{\rm in}$ = 52 µV_{rms}. Given that the FSR is 8.192 V, the effective resolution is 17.3 bits.
ADC input noise floor
Noise floor measured with 50 Ω terminated inputs.
Range 2 V
Range 8 V
ADC front-end frequency response
Range 2 V
Range 8 V
ADC dynamic performances
We measured dynamic performances of the ADC using an ultra-low distortion sine wave at 2 kHz. The measurements are performed on the 8 V range.
FFT of the acquisition for a 4.33 V_{pp} (-5.54 dBFS) signal:
Distortion
Distortion at 2 kHz versus the amplitude of the input tone. The total harmonic distortion (THD) is obtained from the rms sum of the first six harmonics.
Effective number of bits (ENOB)
The ENOB is measured over the full Nyquist bandwidth (7.5 MHz).
ADC crosstalk
Measured on the 8 V range using a 8 V_{pp} sine input signal.
Applications
DAC distortion measurement
We use high dynamic range and linearity of the ADC to characterize the distortion of the RF DAC output once amplified.
DAC output is set to full range (1 V_{pp} on 50 Ω) and amplified to 8 V_{pp} on 1 MΩ using an AMP100. The DAC outputs a 30 kHz sine wave which is acquired using the ADC on the 8 V range. Here is the measured power spectrum:
Second harmonic distortion (HD2) is -85 dB, and third harmonic distortion (HD3) is -86 dB. Total harmonic distortion (THD) using the first 16 harmonics is -81 dB.
Oversampling
Because of its high sampling frequency ($ f_{s} $ = 15 MHz) and the low flicker noise corner frequency ($ f_{c} \lesssim $ 50 Hz), the ALPHA15 is well suited for oversampling applications. The maximum oversampling ratio is about $ N_{\rm max} \sim f_{s} / (2 f_{c}) $ = 150 000, corresponding to about $ \log_{2}(N) / 2 $ = 8.5 additional bits or an overall resolution of 26.5 bits.
We use the decimator instrument with an oversampling ratio of 4096: the cascaded-integrator comb (CIC) first decimates by a factor 2048 and the finite impulse response (FIR) filter by a factor 2. The maximum signal frequency of 1.8 kHz is still well above the 1/f noise corner frequency.
We plot the histogram (using 8192 samples) of the input voltage noise. The input is terminated with 50 Ω and set to the 8 V range.
Input noise is $v_{\rm in} $ = 787 nV_{rms} in the 0.45 Hz to 1.831 kHz acquisition band. Given that the full-scale range (FSR) is 8.192 V, the effective resolution is $ \log_{2} \left( \mathrm{FSR} / v_{\rm in} \right) $ = 23.3 bits, which is a 6 bits improvement.
Battery noise measurement
The ALPHA15-1M ADC front-end offers both low input noise and a high 1 MΩ input impedance, allowing many physical systems to be directly interfaced to the board without a pre-amplifier.
Here we use this feature to directly measure the voltage noise density of a 12 V lead acid battery (SG75-12) and a 24 V LiFePO4 lithium battery (B24008).
The battery output is simply AC-coupled using a 22 µF capacitor, which combined with the 1 MΩ input impedance provides a 7.3 mHz AC cut-off frequency. The ADC is set to the 2 V input range. After waiting for the ADC input voltage to settle, we acquire low frequency data using the decimator instrument: